A display apparatus drives a panel to operate by a timing controller outputting a special driving signal, and generally the timing controller outputs following signals: a frame start signal (STV), a gate line clock signal (CPV), a first output enable signal (OE1), a gate line voltage beveled signal (OE2), a data read and output signal (TP), a pixel polarity control signal (POL) and a data enable signal (DE). Wherein the signals STV, CPV, OE1 and OE2 control and drive gate lines on an array substrate of the display apparatus cooperatively; wherein a rising edge of the signal CPV triggers and drives the respective gate lines, and gate line driving signals for the respective gate lines are triggered sequentially by shift registers; and the signal OE1 is used for insulating the gate line driving signals for adjacent rows so as to avoid a crosstalk.
FIG. 1 is a schematic diagram illustrating a display driving circuit as known. As illustrated in FIG. 1, in the display driving circuit as known, the gate line driving circuit triggers the gate line driving signal according to the gate line clock signal, separates the gate line driving signals for the adjacent rows according to the first output enable signal, and then outputs the separated gate line driving signal to the gate lines. FIG. 2 is a schematic diagram of a relationship between the first output enable signal and the gate line driving signal as known. As illustrated in FIG. 2, at a rising edge of the gate line clock signal CPV, a corresponding gate line driving signal is triggered to be at a high level; and at a rising edge of the first output enable signal OE1, the corresponding gate line driving signal is pulled down to a low level, the gate line driving signal, for example, a signal Gate1 or a signal Gate2 is turned off. It can be seen that, in a high level region of the first output enable signal OE1, the gate line driving signals for the adjacent rows are at the low level and shielded, so a plurality of intervals among the gate line driving signals are formed, and the corresponding gates are forced to be turned off during the interval regions, so that a crosstalk phenomenon between the adjacent gates as being driven are avoided.
However, disadvantages of the existing techniques consist in that the gate line driving signal cannot be shielded with the first output enable signal according to specified situations, for example, frame data resulting in a flicker phenomenon in a frame needs to be shielded in order to settle a flicker problem caused by a POL inversion in a image sticking elimination technique. The existing techniques may separate the gate line driving signals for the adjacent rows only according to the first output enable signal OE1, but cannot trigger and generate a shielding signal according to the specified situation, shield the first output enable signal according to the shielding signal and turn off the corresponding gate line driving signal, so that it cannot remove a data which might lead to an abnormal display.